EP20K100CB356C8 vs EP20K100EBC356-3N 比較

詳細並排比較 EP20K100CB356C8 由 Intel 與 EP20K100EBC356-3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K100CB356C8 EP20K100EBC356-3N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Family APEX 20K APEX 20K
Logic Elements 4,160 —
Typical Gates 100,000 —
Maximum User I/O 252 —
Embedded Array Blocks (EABs) 12 —
Embedded Memory (EAB-based) 24 Kbits —
Phase-Locked Loops (PLLs) 4 —
Core Supply Voltage (VCCINT) 1.8 V —
I/O Supply Voltage (VCCIO) 1.8 V / 2.5 V / 3.3 V (MultiVolt) —
工作溫度 [DATA_NEEDED: operating temperature range] 0 °C to +85 °C
封裝 356-ball LBGA 356-LBGA (Ball Grid Array)
Process Technology 0.18 µm CMOS 0.22 µm CMOS
Configuration Modes PS / PPS / PPA / JTAG (IEEE 1532) —
Speed Grade C8 —
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs_status]
安裝類型 Surface Mount (BGA) Surface Mount
MSL 等級 [DATA_NEEDED: MSL level] —
Series — APEX-20KE
Logic Elements / Cells — 4160
System Gates — 100,000
Embedded Memory (bits) — 53,248
Embedded System Blocks (ESBs) — 26
Maximum User I/Os — 246
腳位數 — 356
Package Dimensions — 45 x 45 mm
Ball Pitch — 1.27 mm
Core Supply Voltage — 1.8 V
Propagation Delay — 1.6 ns (speed grade -3N)
Maximum Internal Frequency — 250 MHz
Programmable Interface — JTAG (IEEE 1149.1)
I/O Standards Supported — LVCMOS, LVTTL, PCI, SSTL-2/3, GTL+

資料表與資源

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