EP20K100QC240-2 vs EP20K100QC240-1XV 比較

詳細並排比較 EP20K100QC240-2 由 Altera 與 EP20K100QC240-1XV 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K100QC240-2 EP20K100QC240-1XV
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Series APEX-20K APEX 20K
Device Type Field Programmable Gate Array (FPGA) —
Number of Logic Elements/Cells 4160 —
Number of LABs/CLBs 416 —
Number of User I/Os 189 —
Total RAM Bits 53248 —
Typical Gate Count 100000 —
Maximum System Gates 263000 —
工作電源電壓 2.375 V to 2.625 V (2.5 V nominal) —
工作溫度範圍 0°C to 85°C (TJ) —
Maximum Internal Frequency 200 MHz 250 MHz
Propagation Delay 3 ns —
封裝 / 外殼 240-BFQFP (PQFP-240) —
Number of Pins / Terminals 240 —
Terminal Pitch 0.5 mm —
安裝類型 Surface Mount Surface Mount (gull-wing leads)
Technology / Process CMOS, 0.22 µm —
Speed Grade -2 —
RoHS 狀態 Unknown Non-compliant (legacy PQFP, non-LEAD-FREE process)
Device Family — APEX 20K (MultiCore architecture)
System Gates — 100,000 gates
Logic Elements (Cells) — 4,160
Embedded Memory — 53,248 bits
User I/Os — 189
Dedicated Inputs — 4
PLLs — 4
Core Supply Voltage (VCCINT) — 2.5 V nominal (2.375 V to 2.625 V)
I/O Supply Voltage (VCCIO) — 3.3 V / 5 V tolerant
Propagation Delay (tpd) — 2.5 ns
Process Technology — 0.22 um CMOS
封裝 — 240-pin PQFP (32 x 32 mm, 0.5 mm pitch)
工作溫度 — 0C to +85C (commercial) / -40C to +85C (industrial variant)
Configuration Interface — JTAG / serial (EPC configuration device)
生命週期狀態 — Obsolete / last-time-buy per Altera PCN

資料表與資源

瀏覽所有產品 建立 BOM 索取報價