EP20K200BC356-1 vs EP20K200CB356C7ES 比較
詳細並排比較 EP20K200BC356-1 由 Altera 與 EP20K200CB356C7ES 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K200BC356-1 | EP20K200CB356C7ES |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Product Function | APEX-20K Field Programmable Gate Array (FPGA) | — |
| Logic Family | CMOS | — |
| Equivalent System Gates | 200K gates | — |
| Logic Elements / Cells | 8320 | 8,320 |
| Total RAM Bits | 106496 bits | — |
| 最大時脈頻率 | 250 MHz | — |
| Core Supply Voltage | 2.5 V | — |
| User I/O Count | 277 | — |
| 腳位數 | 356 | — |
| 封裝 / 外殼 | 356-LBGA | — |
| Package Code | LBGA | — |
| Package Shape | Square | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Process Technology | 0.22 um | 0.15 µm CMOS |
| Propagation Delay (tPD) | 2.5 ns (from -1N variant listing) | — |
| 工作溫度範圍 | 0 to 85 C (commercial, per -1N variant listing) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS/lead finish of original non-N EP20K200BC356-1] | [DATA_NEEDED: rohs status] |
| Lead-Free Finish | [DATA_NEEDED: original non-N finish not specified; N suffix indicates lead-free] | — |
| Family | — | APEX 20KC |
| System Gates | — | 200,000 |
| Maximum User I/O | — | 271 |
| 封裝 | — | 356-Ball BGA (CB) |
| Core Voltage | — | 1.8 V |
| Operating Frequency (max) | — | 375.94 MHz |
| Embedded Memory Blocks | — | Yes (ESB - True Dual-Port / CAM) |
| PLLs | — | 4 |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+ |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1) |
| Operating Temperature Grade | — | Commercial (0°C to +70°C) |