EP20K200BC356-3 vs EP20K200BC356-1 比較

詳細並排比較 EP20K200BC356-3 由 Intel 與 EP20K200BC356-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K200BC356-1 EP20K200BC356-1 - APEX-20K 200K-Gate FPGA | Altera

EP20K200BC356-1 - APEX-20K 200K-Gate FPGA | Altera

EP20K200BC356-1 Obsolete

規格比較

參數 EP20K200BC356-3 EP20K200BC356-1
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series APEX-20K —
Family APEX 20K (MultiCore) —
Logic Elements / Cells 8320 8320
Embedded Memory Bits 106496 —
Number of Macrocells 832 —
User I/Os 277 —
封裝 356-LBGA —
Total Package Pins 356 —
Supply Voltage (Core) 2.5 V —
Technology 0.22 µm CMOS —
Maximum Internal Frequency 167 MHz —
Propagation Delay 2.5 ns —
Logic Family CMOS CMOS
工作溫度 0 °C to +85 °C (Commercial) —
安裝類型 Surface Mount (BGA) Surface Mount
Configuration Interface IEEE 1149.1 JTAG —
RoHS 狀態 unknown [DATA_NEEDED: RoHS/lead finish of original non-N EP20K200BC356-1]
Product Function — APEX-20K Field Programmable Gate Array (FPGA)
Equivalent System Gates — 200K gates
Total RAM Bits — 106496 bits
最大時脈頻率 — 250 MHz
Core Supply Voltage — 2.5 V
User I/O Count — 277
腳位數 — 356
封裝 / 外殼 — 356-LBGA
Package Code — LBGA
Package Shape — Square
Process Technology — 0.22 um
Propagation Delay (tPD) — 2.5 ns (from -1N variant listing)
工作溫度範圍 — 0 to 85 C (commercial, per -1N variant listing)
Lead-Free Finish — [DATA_NEEDED: original non-N finish not specified; N suffix indicates lead-free]

資料表與資源

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