EP20K200CF484C8ES vs EP20K200CF484C8 比較
詳細並排比較 EP20K200CF484C8ES 由 Altera 與 EP20K200CF484C8 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K200CF484C8ES | EP20K200CF484C8 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | NRND |
| Series | APEX-20KC | — |
| Family | APEX 20K | APEX 20KC |
| Logic Elements | 8,320 | 8,320 |
| System Gates | 200,000 | 200,000 |
| Embedded Memory (RAM bits) | 106,496 | — |
| Number of Logic Array Blocks (LABs) | 104 | — |
| Number of Embedded System Blocks (ESBs) | 13 | — |
| User I/O Pins (max) | 376 | — |
| PLLs | 4 | — |
| Core Voltage | 1.8 V | 1.8 V |
| Speed Grade | C8 (-8 commercial) | — |
| 封裝 | 484-pin FBGA (FineLine BGA) | 484-FBGA (FineLine BGA, 23x23 mm) |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| 工作溫度 | 0C to +85C (commercial) | Commercial (0C to +85C) |
| Process Node | 0.18 micron CMOS | — |
| Configuration Interface | JTAG (IEEE 1149.1) / Altera serial | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL, SSTL, HSTL, AGP | — |
| Lead Free / RoHS | [DATA_NEEDED: lead-free status] | — |
| Embedded Memory Bits | — | 106,496 bits |
| Maximum User I/O | — | 376 |
| Process Technology | — | 0.15 µm CMOS |
| Maximum Frequency | — | 301.21 MHz (per FPGAkey listing) |
| Embedded Memory Type | — | ESB (Embedded System Block) — RAM/ROM/CAM/FIFO |
| Configuration Modes | — | Passive Serial, Passive Parallel Synchronous, Active Serial |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+ |
| RoHS 狀態 | — | Non-compliant (per alterachips.com listing) |