EP20K200RC208-1 vs EP20K200RC208-1X 比較
詳細並排比較 EP20K200RC208-1 由 Intel 與 EP20K200RC208-1X 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K200RC208-1 - APEX 20K 200K Gates FPGA, 208-Pin RQFP | Intel / Altera
EP20K200RC208-1 ⚠ 最後購買機會規格比較
| 參數 | EP20K200RC208-1 | EP20K200RC208-1X |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | APEX-20K | APEX-20KE |
| Series | APEX 20K (200K gates) | — |
| System Gates | 200,000 | — |
| Logic Elements / Cells | 8,320 | — |
| Embedded Memory (bits) | 106,496 | — |
| Maximum User I/O | 144 | — |
| Number of PLLs | 4 | — |
| Process Technology | 0.22 µm CMOS | 0.18 µm CMOS |
| Core Supply Voltage | 2.5 V | — |
| I/O Standard Support | LVTTL, LVCMOS, 2.5 V/3.3 V PCI, 1.8 V LVDS | — |
| Maximum Internal Frequency | 250 MHz | — |
| 封裝 | 208-BFQFP (RQFP) with Exposed Pad, 28×28 mm | 208-pin PQFP / RQFP (28x28 mm), 0.5 mm pitch |
| 安裝類型 | Surface Mount | Surface Mount (gull-wing leads) |
| Configuration Interface | Passive Serial, Passive Parallel, JTAG (IEEE 1149.1) | IEEE 1149.1 JTAG, serial, passive parallel (PPA), EPC configuration devices |
| 工作溫度 | Industrial range | 0 °C to +85 °C (commercial) |
| RoHS 狀態 | unknown | Compliant (lead-free PQFP package) |
| MSL 等級 | [DATA_NEEDED: MSL Level] | — |
| Logic Elements | — | 8,320 cells |
| Typical Gate Count | — | 200,000 gates |
| Embedded RAM Bits | — | 106,496 bits |
| Embedded RAM Blocks (ESBs) | — | 4 lanes / 52 ESBs |
| Maximum User I/O Pins | — | 144 (PQFP-208 variant) |
| Core Voltage | — | 1.8 V (±5%) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS, GTL+ |
| Speed Grade | — | -1X (1.8 V core, PQFP-208 pinout) |
| MultiCore Architecture | — | LUT logic + product-term logic + embedded memory |
| PLL Count | — | 4 enhanced PLLs (with programmable phase shift) |
| Moisture Sensitivity Level | — | MSL 3 (per JEDEC J-STD-020, applicable to PQFP) |