EP20K200RC208-1 vs EP20K200RC208-2 比較
詳細並排比較 EP20K200RC208-1 由 Intel 與 EP20K200RC208-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K200RC208-1 - APEX 20K 200K Gates FPGA, 208-Pin RQFP | Intel / Altera
EP20K200RC208-1 ⚠ 最後購買機會
規格比較
| 參數 | EP20K200RC208-1 | EP20K200RC208-2 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | NRND |
| Family | APEX-20K | APEX-20K MultiCore FPGA |
| Series | APEX 20K (200K gates) | APEX-20K |
| System Gates | 200,000 | 200,000 (typical) |
| Logic Elements / Cells | 8,320 | — |
| Embedded Memory (bits) | 106,496 | 106,496 |
| Maximum User I/O | 144 | 144 |
| Number of PLLs | 4 | — |
| Process Technology | 0.22 µm CMOS | [DATA_NEEDED: process node] |
| Core Supply Voltage | 2.5 V | — |
| I/O Standard Support | LVTTL, LVCMOS, 2.5 V/3.3 V PCI, 1.8 V LVDS | — |
| Maximum Internal Frequency | 250 MHz | — |
| 封裝 | 208-BFQFP (RQFP) with Exposed Pad, 28×28 mm | 208-BQFP / 208-RQFP with Exposed Pad |
| 安裝類型 | Surface Mount | Surface Mount |
| Configuration Interface | Passive Serial, Passive Parallel, JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) + Altera legacy scheme |
| 工作溫度 | Industrial range | -40C to +85C (industrial) |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS compliance] |
| MSL 等級 | [DATA_NEEDED: MSL Level] | [DATA_NEEDED: MSL rating] |
| Logic Elements (LEs) | — | 8320 |
| 腳位數 | — | 208 |
| Speed Grade | — | -2 (mid-speed, industrial) |
| Supply Voltage (Core) | — | [DATA_NEEDED: core VCC] |
| Supply Voltage (I/O) | — | 3.3 V (multi-standard I/O) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |