EP20K300EFI672-2N vs EP20K300EFC672-1N 比較
詳細並排比較 EP20K300EFI672-2N 由 Altera 與 EP20K300EFC672-1N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K300EFI672-2N | EP20K300EFC672-1N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | APEX-20KE | APEX 20KE |
| Series | APEX 20K | APEX-20KE |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Typical Gate Count | 300,000 gates | — |
| Logic Elements / Cells | 11,520 | — |
| Embedded Memory (bits) | 147,456 | — |
| Maximum User I/O | 408 | — |
| Number of Macros | 1,152 | — |
| Core Voltage | 1.71 V to 1.89 V | — |
| Process Technology | 0.22 µm CMOS | 0.22 um CMOS |
| Maximum Internal Frequency | 350 MHz | 160 MHz |
| 封裝 / 外殼 | 672-BBGA (FineLine BGA, 27x27 mm) | 672-BBGA (FineLine BGA, 27x27 mm) |
| 安裝類型 | Surface Mount | Surface Mount |
| Speed Grade | -2 | — |
| 工作溫度 | -40 °C to +85 °C (Industrial) | 0 C to +85 C (commercial) |
| PLLs | 4 | — |
| Configuration Modes | Passive Serial, Passive Parallel, Active Serial, JTAG | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| System Gates | — | 300,000 |
| Logic Elements (LEs) / Cells | — | 11,520 |
| Macros | — | 1,152 |
| Embedded Memory Bits | — | 147,456 bits |
| User I/O Pins | — | 408 |
| Supply Voltage (Core) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Propagation Delay | — | 1.68 ns |
| Supplier Device Package | — | 672-FBGA (27x27) |