EP20K30EFC144-2X vs EP20K60EFC144-2 比較
詳細並排比較 EP20K30EFC144-2X 由 Altera 與 EP20K60EFC144-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K30EFC144-2X | EP20K60EFC144-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | Altera APEX 20K | — |
| Device Type | Loadable programmable logic device (FPGA/CPLD hybrid) | — |
| Typical Gates | 30,000 gates | 60,000 |
| Number of Logic Elements / Cells | 1,200 cells (third-party parametric listing) | — |
| Number of Macrocells | 192 | — |
| Number of User I/O | 93 | — |
| Number of Terminals | 144 | — |
| Terminal Form | Ball | — |
| Package Code | LBGA / 144-FBGA | — |
| Package Shape | Square | — |
| Core Supply Voltage | 1.8 V | 1.71 V to 1.89 V |
| Process Technology | 0.22 um | 0.18 µm CMOS |
| Speed Grade | -2X | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度範圍 | [DATA_NEEDED: exact operating temperature range] | — |
| Embedded RAM Bits | [DATA_NEEDED: embedded memory size] | — |
| Supported I/O Standards | [DATA_NEEDED: supported I/O standards] | — |
| Configuration Schemes | [DATA_NEEDED: supported configuration schemes] | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS status] |
| Series | — | APEX-20K |
| Family | — | APEX-20KE (Enhanced, 1.8 V core) |
| Logic Elements | — | 2,560 |
| Total RAM Bits | — | 32,768 |
| User I/O | — | 92 to 93 |
| Internal Frequency (max) | — | 160 MHz |
| Propagation Delay | — | 1.72 ns |
| 封裝 | — | 144-LQFP (also referenced as 144-FBGA 13x13 in some sources) |
| 工作溫度 | — | 0 °C to +85 °C (commercial) |
| JTAG Support | — | IEEE 1149.1 boundary scan |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+ |
| Configuration Method | — | Serial/Parallel passive, JTAG, EPC companion |