EP20K400CF672C8AA vs EP20K400CF672C8ES 比較

詳細並排比較 EP20K400CF672C8AA 由 Intel 與 EP20K400CF672C8ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K400CF672C8AA EP20K400CF672C8ES
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX 20K APEX 20KC
Number of Logic Elements/Cells 16640 —
Number of Logic Units (LEs) [DATA_NEEDED: number of LUs] —
Embedded System Blocks (ESBs) 212 —
On-chip RAM Bits [DATA_NEEDED: total embedded memory bits] —
Number of User I/O Pins 488 —
Package Type 672-ball Fine-Pitch BGA (FBGA) —
Number of Pins/Balls 672 —
Supply Voltage (Core) 2.5 V —
I/O Standards Supported LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O) —
Propagation Delay [DATA_NEEDED: typical propagation delay] 2.5 ns
工作溫度 0 C to 85 C (Commercial) 0°C to 85°C (Commercial)
安裝類型 Surface Mount —
Packaging Tray —
濕度敏感等級 (MSL) 3 (168 Hours) —
Configuration Interface JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous —
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: not stated in verified data]
Series — EP20K400
Logic Cells / Macros — 16,640
System Gates (typical) — 400,000
System Gates (maximum) — 212,992 [DATA_NEEDED: confirm datasheet interpretation]
Maximum User I/O — 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value]
Bidirectional I/O — 484
Maximum Internal Frequency — 301.21 MHz
Process Technology — 0.15 µm CMOS
Nominal Supply Voltage — 1.8 V
Supply Voltage Range — 1.71 V to 1.89 V
封裝 — 672-BGA FineLine (FC-FBGA / S-PBGA-B672)
Logic Family — CMOS
Architecture — MultiCore™ (LUT + Embedded System Block)
Programming Method — JTAG / in-system via configuration memory

資料表與資源

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