EP20K400CF672I7 vs EP20K400CF672C7N 比較
詳細並排比較 EP20K400CF672I7 由 Intel 與 EP20K400CF672C7N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400CF672I7 | EP20K400CF672C7N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 16,640 | — |
| Maximum System Gates | 400,000 | 1,052,000 |
| Embedded Memory (ESB) | 212,992 bits | — |
| Maximum User I/O Pins | [DATA_NEEDED: pin count for CF672 package] | — |
| Process Technology | 0.15 um CMOS | 0.18-micron CMOS, all-layer copper interconnect |
| Core Supply Voltage | 1.8 V | — |
| I/O Supply Voltage | 1.8 V / 3.3 V | — |
| PLL Count | 4 | — |
| 工作溫度 | -40 C to +85 C (industrial) | 0 C to 85 C (Commercial) |
| Speed Grade | I7 | — |
| 封裝 | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA) | 672-ball FineLine BGA (FC-FBGA / BBGA) |
| Terminal Finish | Tin/Lead (Sn/Pb) | — |
| JESD-609 Code | e0 | — |
| 濕度敏感等級 (MSL) | 3 | — |
| Configuration Mode | PS / AS / JTAG (IEEE 1149.1) | — |
| Typical Gates | — | 400,000 |
| Logic Elements (LEs) | — | 16,640 |
| Embedded Memory | — | 488 Kbits |
| Maximum User I/O | — | 488 |
| User I/O (per catalog) | — | 480 / 502 (per source) |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 3.3 V / 2.5 V banked |
| Propagation Delay | — | 2.5 ns (catalog) / 1.48 ns (some catalog) |
| Maximum Frequency | — | 375.94 MHz (internal) |
| 安裝類型 | — | Surface Mount (BGA) |
| MSL 等級 | — | 3 (per JEDEC J-STD-020) |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS status not in provided data] |
| Configuration Modes | — | PS, PPS, JTAG |