EP20K400CFC672-9 vs EP20K400CF672I9 比較

詳細並排比較 EP20K400CFC672-9 由 Altera 與 EP20K400CF672I9 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K400CFC672-9 EP20K400CF672I9
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Family APEX-20KC APEX 20KC
Logic Elements / Macrocells 1664 —
Typical Gate Count 400,000 gates —
Embedded Memory (ESB) 212,992 bits —
User I/O Count 488 —
PLLs 4 —
Core Supply Voltage 1.71 V to 1.89 V —
I/O Supply Voltage 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Operating Temperature (TJ) 0 °C to 85 °C —
Speed Grade -9 (commercial, slowest bin) I9 (Industrial)
封裝 672-ball FineLine BGA (FCBGA) 672-ball FC-FBGA (FineLine BGA)
Package Body Size 27 mm × 27 mm —
安裝類型 Surface Mount (BGA) —
Configuration Method EPC serial device or JTAG —
Process Node [DATA_NEEDED: process node] —
RoHS 狀態 [DATA_NEEDED: RoHS status] Non-compliant (e0 terminal finish indicates SnPb)
Logic Elements — 16,640 cells
System Gates — 400,000
Maximum Operating Frequency — 250 MHz
Embedded RAM — 212,992 bits
Embedded System Blocks (ESBs) — 104
Maximum User I/O Pins — [DATA_NEEDED: max user I/O count]
Process Technology — 0.15 µm CMOS
Core Voltage — 1.8 V
I/O Voltage — 1.8 V / 3.3 V (MultiVolt)
Package Pitch — 1.0 mm
工作溫度 — -40°C to +85°C (Industrial)
濕度敏感等級 (MSL) — 3
Terminal Finish — e0 (Tin-Lead, per JESD-609)

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