EP20K400EBC652-1X vs EP20K400GC655-1 比較

詳細並排比較 EP20K400EBC652-1X 由 Intel 與 EP20K400GC655-1 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K400EBC652-1X EP20K400GC655-1
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX 20KE APEX 20K
Series APEX-20KE® EP20K400
Logic Elements / Cells 16640 —
System Gates 1052000 (typical marketing) —
Embedded Memory (bits) 212992 —
Number of Macrocells 1664 —
Number of User I/Os 488 —
Supply Voltage - Core 1.8 V (1.71 V to 1.89 V) —
Supply Voltage - I/O 2.5 V (multi-voltage I/O supported) —
Process Technology 0.22 µm CMOS 0.22 µm CMOS
封裝 / 外殼 652-BGA (45 x 45 mm) —
Supplier Device Package 652-BGA —
工作溫度 0 °C to +85 °C (Commercial) 0 °C to +85 °C (commercial)
Speed Grade -1X (faster bin) —
安裝類型 Surface Mount Through-Hole
Propagation Delay (per macrocell) [DATA_NEEDED: per-datasheet ns] —
RoHS 狀態 [DATA_NEEDED: not confirmed for this specific lot] Non-compliant (contains lead in ceramic package)
Lead-Free Yes (per modern distribution) —
Logic Elements — 16,640
Maximum Gates — 1,052,000
Typical Gates — 400,000
Embedded System Blocks (ESBs) — 4
Total RAM Bits — 212,992
Maximum User I/O — 502
Dedicated Inputs — 6
Core Supply Voltage — 2.5 V
I/O Supply Voltage — 3.3 V
Maximum Internal Frequency — 250 MHz
Propagation Delay — 2.5 ns
封裝 — 655-pin CPGA (Ceramic Pin Grid Array)
腳位數 — 655
Configuration Modes — Passive Serial, Passive Parallel Async, Passive Parallel Sync
Boundary Scan — IEEE 1149.1 (JTAG)

資料表與資源

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