EP20K400FG672-2 vs EP20K400FI672-2X 比較
詳細並排比較 EP20K400FG672-2 由 Altera 與 EP20K400FI672-2X 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400FG672-2 | EP20K400FI672-2X |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | APEX 20K | APEX 20K |
| Maximum System Gates | 1,060,000 (typ 400,000) | — |
| Logic Elements | 21,500 | 16,640 |
| Embedded System Blocks (ESBs) | 488 | — |
| Maximum RAM Bits | 212,992 | — |
| Macros / Logic Elements | 16,640 | — |
| Maximum User I/O | 488 | — |
| Speed Grade | -2 | -2X |
| 封裝 | 672-ball FineLine BGA (FG672) | 672-ball BGA (FI672) |
| Core Voltage | 2.5 V (2.375 V to 2.625 V) | 1.8 V |
| Process Technology | 0.18 micron CMOS | 0.18 um CMOS, 6-metal |
| 工作溫度 | 0C to +85C (commercial) | -40C to +85C (industrial) |
| Propagation Delay | 3.1 ns (typ) | — |
| Maximum Internal Clock Frequency | [DATA_NEEDED: maximum internal clock frequency] | — |
| 安裝類型 | Surface Mount | — |
| RoHS 狀態 | non_compliant (legacy) | [DATA_NEEDED: RoHS compliance] |
| Toolchain Support | Quartus II / MAX+PLUS II only | — |
| Typical Gates | — | 400,000 system gates |
| Embedded Memory | — | 212,992 bits |
| User I/O Pins | — | 496 |
| Package Code | — | BGA |
| Terminal Form | — | Ball |
| No. of Terminals | — | 672 |
| Package Shape | — | Square |
| I/O Voltage Support | — | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) |
| Configuration Method | — | SRAM (serial EPROM or JTAG) |
| JTAG Support | — | Yes (IEEE 1149.1) |