EP20K400FI672-2 vs EP20K400PI655-2X 比較
詳細並排比較 EP20K400FI672-2 由 Altera 與 EP20K400PI655-2X 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP20K400FI672-2 - 400K Gates APEX-20K FPGA, 502 I/O, 672-FBGA | Altera
EP20K400FI672-2 ObsoleteIntel
EP20K400PI655-2X - APEX 20K 400K Gates FPGA, 655-Pin PQFP | Intel / Altera
EP20K400PI655-2X Obsolete規格比較
| 參數 | EP20K400FI672-2 | EP20K400PI655-2X |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX-20K | APEX 20K |
| Logic Elements | 16640 | — |
| Maximum Gates | 400,000 gates | — |
| User I/Os | 502 | — |
| Embedded Memory Bits | 212992 | — |
| Number of Macros | 1664 | — |
| Process Technology | 0.22 µm CMOS | 0.18 um CMOS |
| Core Supply Voltage | 2.5 V | — |
| Maximum Internal Frequency | 200 MHz | — |
| Propagation Delay | 2.5 ns | — |
| 工作溫度 | 0 °C to +85 °C (Commercial) | -40C to +85C (Industrial) |
| Package Type | 672-pin Fine-pitch Ball Grid Array (FBGA/FCBGA) | — |
| PLLs (Phase-Locked Loops) | 4 | — |
| Configuration Modes | JTAG, Passive Serial, Passive Parallel | — |
| RoHS 狀態 | Lead-free / RoHS Compliant | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| Device Series | — | EP20K400 |
| Speed Grade | — | -2X |
| Maximum Logic Elements | — | 16,640 |
| Maximum System Gates | — | 400,000 |
| Maximum RAM Bits | — | 166,400 |
| Embedded System Blocks (ESBs) | — | 104 |
| Maximum User I/O Pins | — | 488 |
| Maximum PLLs | — | 4 |
| 封裝 | — | PQFP-655 (Power Quad Flat Pack) |
| Core Voltage | — | 3.3 V |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+ |
| Configuration Method | — | Serial / Parallel / JTAG |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |
| 生命週期狀態 | — | Obsolete (legacy Altera APEX 20K family) |