EP20K400FI672-2X vs EP20K400PI655-2X 比較
詳細並排比較 EP20K400FI672-2X 由 Intel 與 EP20K400PI655-2X 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K400PI655-2X - APEX 20K 400K Gates FPGA, 655-Pin PQFP | Intel / Altera
EP20K400PI655-2X Obsolete規格比較
| 參數 | EP20K400FI672-2X | EP20K400PI655-2X |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | APEX 20K | APEX 20K |
| Logic Elements | 16,640 | — |
| Typical Gates | 400,000 system gates | — |
| Embedded Memory | 212,992 bits | — |
| User I/O Pins | 496 | — |
| 封裝 | 672-ball BGA (FI672) | PQFP-655 (Power Quad Flat Pack) |
| Package Code | BGA | — |
| Terminal Form | Ball | — |
| No. of Terminals | 672 | — |
| Package Shape | Square | — |
| Speed Grade | -2X | -2X |
| 工作溫度 | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| Core Voltage | 1.8 V | 3.3 V |
| I/O Voltage Support | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) | — |
| Configuration Method | SRAM (serial EPROM or JTAG) | Serial / Parallel / JTAG |
| JTAG Support | Yes (IEEE 1149.1) | — |
| Process Technology | 0.18 um CMOS, 6-metal | 0.18 um CMOS |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | — |
| Device Series | — | EP20K400 |
| Maximum Logic Elements | — | 16,640 |
| Maximum System Gates | — | 400,000 |
| Maximum RAM Bits | — | 166,400 |
| Embedded System Blocks (ESBs) | — | 104 |
| Maximum User I/O Pins | — | 488 |
| Maximum PLLs | — | 4 |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+ |
| 安裝類型 | — | Surface Mount |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |
| 生命週期狀態 | — | Obsolete (legacy Altera APEX 20K family) |