EP20K400FI784-1 vs EP20K400FI784-2 比較

詳細並排比較 EP20K400FI784-1 由 Altera 與 EP20K400FI784-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K400FI784-1 EP20K400FI784-2
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX 20K —
Series EP20K400 —
Device Type Loadable PLD (FPGA-class) —
Usable Gates 400,000 —
Logic Elements 1,560 —
Embedded Memory (EAB RAM) 212,992 bits —
Maximum User I/O 488 —
Maximum Internal Clock Frequency 6.1 GHz —
Package Type 784-ball Fine-pitch BGA (S-PBGA-B784) S-PBGA-B784 (FineLine BGA)
安裝類型 Surface Mount Surface Mount
工作接面溫度 -40°C to +100°C (industrial 'I') —
Supply Voltage - Core 1.8 V —
I/O Standards Supported 3.3 V / 5 V PCI, LVTTL, LVCMOS —
Dedicated Inputs 4 4
Process Technology 0.18 µm CMOS, 6-layer metal [DATA_NEEDED: process node]
Boundary Scan JTAG IEEE 1149.1 —
Lead-Free / RoHS [DATA_NEEDED: RoHS status] —
Device Family — APEX 20K
Typical Gates — 400,000
Logic Elements (LEs) — [DATA_NEEDED: logic elements count]
Embedded System Blocks (ESBs) — [DATA_NEEDED: ESB count]
Maximum User I/O Pins — [DATA_NEEDED: user I/O count]
Nominal Core Supply Voltage (VCCINT) — 2.5 V
VCCINT Range — 2.375 V to 2.625 V
Speed Grade — -2
工作溫度範圍 — -40 °C to +100 °C
Package Pin Count — 784 balls
Ball Pitch — 1.000 mm
RoHS 狀態 — [DATA_NEEDED: RoHS compliance]
Lead-Free — [DATA_NEEDED: lead-free status]
MSL 等級 — [DATA_NEEDED: MSL rating]
Device Form Factor — Loadable PLD
Configuration Memory — SRAM-based (volatile)

資料表與資源

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