EP20K400FI784-2 vs EP20K400FI784-1 比較
詳細並排比較 EP20K400FI784-2 由 Altera 與 EP20K400FI784-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400FI784-2 | EP20K400FI784-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | APEX 20K | — |
| Typical Gates | 400,000 | — |
| Logic Elements (LEs) | [DATA_NEEDED: logic elements count] | — |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | — |
| Maximum User I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Dedicated Inputs | 4 | 4 |
| Nominal Core Supply Voltage (VCCINT) | 2.5 V | — |
| VCCINT Range | 2.375 V to 2.625 V | — |
| Speed Grade | -2 | — |
| 工作溫度範圍 | -40 °C to +100 °C | — |
| Package Type | S-PBGA-B784 (FineLine BGA) | 784-ball Fine-pitch BGA (S-PBGA-B784) |
| Package Pin Count | 784 balls | — |
| Ball Pitch | 1.000 mm | — |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| Device Form Factor | Loadable PLD | — |
| Process Technology | [DATA_NEEDED: process node] | 0.18 µm CMOS, 6-layer metal |
| Configuration Memory | SRAM-based (volatile) | — |
| Family | — | APEX 20K |
| Series | — | EP20K400 |
| Device Type | — | Loadable PLD (FPGA-class) |
| Usable Gates | — | 400,000 |
| Logic Elements | — | 1,560 |
| Embedded Memory (EAB RAM) | — | 212,992 bits |
| Maximum User I/O | — | 488 |
| Maximum Internal Clock Frequency | — | 6.1 GHz |
| 工作接面溫度 | — | -40°C to +100°C (industrial 'I') |
| Supply Voltage - Core | — | 1.8 V |
| I/O Standards Supported | — | 3.3 V / 5 V PCI, LVTTL, LVCMOS |
| Boundary Scan | — | JTAG IEEE 1149.1 |
| Lead-Free / RoHS | — | [DATA_NEEDED: RoHS status] |