EP20K400GC652-1XV vs EP20K400BC652-1V 比較
詳細並排比較 EP20K400GC652-1XV 由 Altera 與 EP20K400BC652-1V 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400GC652-1XV | EP20K400BC652-1V |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20K | APEX 20K |
| Logic Elements (Macros) | 1664 | — |
| Typical System Gates | 400,000 | — |
| Maximum User I/O | 502 | 502 |
| Embedded SRAM | 212,992 bits | — |
| Core Supply Voltage | 2.5 V | — |
| Propagation Delay | 2.5 ns | — |
| Logic Family | CMOS | — |
| Package Type | BGA-652 (thermally enhanced) | — |
| 工作溫度 | 0 C to +85 C | 0C to +85C (commercial) |
| Speed Grade | -1 (standard) | -1 |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | Compliant (lead-free, V suffix) | [DATA_NEEDED: RoHS compliance] |
| Architecture | MultiCore (LUT + EAB + FastTrack interconnect) | MultiCore (LUT + product-term + ESB) |
| Programming Interface | JTAG (IEEE 1149.1) / passive serial | — |
| Series | — | APEX-20KC |
| Device Sub-Family | — | EP20K400 |
| System Gates | — | 1,052,000 |
| Maximum Logic Elements | — | 212,992 |
| Macrocells / LABs | — | 16640 |
| Embedded Memory (bits) | — | 212,992 |
| Clock-to-Output (Tco) | — | 2.5 ns |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 2.5 V |
| 封裝 | — | 652-BGA (FineLine, 45 x 45 mm) |
| Configuration | — | SRAM-based, JTAG IEEE 1149.1 |