EP20K400GI655-1X vs EP20K400GI655-2V 比較
詳細並排比較 EP20K400GI655-1X 由 Altera 與 EP20K400GI655-2V 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP20K400GI655-1X - 400K Gate APEX 20K FPGA, 16640 Logic Elements, 655-Pin CPGA | Altera (Intel)
EP20K400GI655-1X Obsolete規格比較
| 參數 | EP20K400GI655-1X | EP20K400GI655-2V |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20K | APEX 20K |
| Device | EP20K400 | — |
| Logic Elements | 16640 | 16,640 |
| Number of Terminals | 655 | — |
| User I/O Lines | 502 | — |
| Dedicated Inputs | 4 | 6 |
| Package Type | Ceramic Pin Grid Array (CPGA) | — |
| Package Code (JESD-30) | S-CPGA-P655 | — |
| Package Equivalence Code | SPGA655,47X47 | SPGA655,47X47 |
| Package Body Material | CERAMIC (metal-sealed co-fired) | Ceramic |
| Speed Grade | -1 | — |
| Propagation Delay | 2.5 ns (typical for -1 grade) | 3.0 ns to 3.1 ns |
| Process Technology | CMOS, SRAM-based configuration | 0.18 µm CMOS |
| 濕度敏感等級 (MSL) | 1 | 1 |
| Peak Reflow Temperature | 220 C | — |
| 工作溫度 | -40 C to +85 C (industrial) | Industrial (per -2V speed grade) |
| 安裝類型 | Through-Hole (PGA) | — |
| RoHS 狀態 | Compliant | Non-compliant (ceramic SPGA, contains lead) |
| Maximum Gates | — | 400,000 |
| Embedded RAM Bits | — | 212,992 |
| User I/O Pins | — | 496 |
| 封裝 | — | SPGA-655 (ceramic, 47 x 47 mm) |
| Core Supply Voltage | — | 2.5 V (2.375 V to 2.625 V) |
| I/O Supply Voltage | — | 3.3 V |