EP20K600CB652C9 vs EP20K600EBC652-3 比較

詳細並排比較 EP20K600CB652C9 由 Altera 與 EP20K600EBC652-3 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600CB652C9 EP20K600EBC652-3
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX 20KC APEX 20K
Logic Elements / Cells 24,320 —
Number of LABs / CLBs 2,432 —
System Gates 1,537,000 —
Total RAM Bits 311,296 —
User I/O 488 —
Number of I/O Banks [DATA_NEEDED: I/O bank count] —
供應電壓 1.71 V to 1.89 V —
Process Technology 0.15 µm all-layer copper CMOS 0.15-micron all-layer copper CMOS
Internal Datapath Frequency up to 250 MHz —
Propagation Delay (typ.) 1.48 ns —
工作溫度 0 °C to 85 °C (commercial) 0 C to 85 C
封裝 652-BGA (45 × 45 mm, 1.27 mm pitch) —
安裝類型 Surface Mount (BGA) Surface Mount
Configuration JTAG IEEE 1149.1 / serial / EPC2-compatible —
RoHS 狀態 Compliant (per Altera product page) [DATA_NEEDED: RoHS status]
Product Status Obsolete (per distributor listings) —
Series — APEX-20KE
Device Type — FPGA (Field Programmable Gate Array) / SPLD Loadable
Logic Elements — 24320
Embedded Memory — 311296 bits
User I/Os — 488
Number of Terminals — 652
Package Type — BGA-652 (45 x 45 mm, 1.27 mm pitch)
Propagation Delay — 1.48 ns
Speed Grade — -3
Core Voltage — [DATA_NEEDED: core voltage]
I/O Voltage Support — Multi-volt 3.3 V / 2.5 V / 1.8 V
Configuration Method — JTAG / serial / passive parallel
PLLs — 4
Lead-Free — [DATA_NEEDED: lead-free]

資料表與資源

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