EP20K600CB672C8 vs EP20K600CB652C9 比較
詳細並排比較 EP20K600CB672C8 由 Intel 與 EP20K600CB652C9 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K600CB672C8 - APEX 20KC FPGA 600K Gates 672-FBGA | Intel / Altera
EP20K600CB672C8 Obsolete
規格比較
| 參數 | EP20K600CB672C8 | EP20K600CB652C9 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX 20KC | — |
| Family | APEX-20KC® | APEX 20KC |
| Number of Logic Elements/Cells | 24320 | — |
| Total RAM Bits | 311296 | 311,296 |
| Number of I/O | 508 | — |
| Number of Gates | 600000 | — |
| Voltage - Supply | 1.71 V to 1.89 V (core); 3.0 V to 3.6 V (I/O) | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| 工作溫度 | 0 °C to +85 °C (commercial) | 0 °C to 85 °C (commercial) |
| 封裝 / 外殼 | 672-BBGA, FCBGA (27 x 27 mm) | — |
| Supplier Device Package | 672-FBGA (27 x 27) | — |
| Speed Grade | C8 (approx. 301 MHz internal) | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm all-layer copper CMOS |
| PLLs | 4 | — |
| I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, GTL+, PCI 3.3 V | — |
| RoHS 狀態 | Unknown (legacy part, pre-RoHS era) | Compliant (per Altera product page) |
| Lead Free | Unknown | — |
| Logic Elements / Cells | — | 24,320 |
| Number of LABs / CLBs | — | 2,432 |
| System Gates | — | 1,537,000 |
| User I/O | — | 488 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| 供應電壓 | — | 1.71 V to 1.89 V |
| Internal Datapath Frequency | — | up to 250 MHz |
| Propagation Delay (typ.) | — | 1.48 ns |
| 封裝 | — | 652-BGA (45 × 45 mm, 1.27 mm pitch) |
| Configuration | — | JTAG IEEE 1149.1 / serial / EPC2-compatible |
| Product Status | — | Obsolete (per distributor listings) |