EP20K600CF33C8N vs EP20K600CF1020C7 比較
詳細並排比較 EP20K600CF33C8N 由 Intel 與 EP20K600CF1020C7 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K600CF33C8N | EP20K600CF1020C7 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements / Cells | 24,320 | 24,320 |
| Total RAM Bits | 311,296 | — |
| Number of LABs / CLBs | 2,432 | — |
| Number of Gates | 1,537,000 (max) | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Core Voltage Supply | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Technology / Process | 0.15 µm CMOS | — |
| Maximum Internal Frequency | 301.21 MHz | — |
| Speed Grade | -8 (slower than -7) | 7 |
| 工作溫度 | 0°C to 85°C (TJ) | — |
| 封裝 | 1020-pin FC-FBGA (flip-chip) | 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| Pitch | 0.33 mm | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Programmable Type | In-System / SRAM-based | — |
| Configuration Interface | JTAG (IEEE 1149.1) + Passive Serial / Parallel | — |
| RoHS 狀態 | Compliant (N suffix) | [DATA_NEEDED: RoHS status] |
| Manufacturer | — | Altera (now Intel) |
| Typical Gates | — | 311,000 |
| Maximum System Gates | — | 600,000 |
| Maximum Operating Frequency | — | 375.94 MHz |
| Process Technology | — | 0.15 micrometer CMOS |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V (nominal 1.8 V) |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) |
| User I/O Count | — | 588 |
| Total Inputs | — | 580 + 4 dedicated |
| Propagation Delay (Tpd) | — | 1.6 ns |
| Operating Temperature Grade | — | Commercial (C) |
| Configuration Method | — | SRAM-based, serial/parallel passive or enhanced configuration device |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |