EP20K600CF33C8N vs EP20K600CF33C8 比較
詳細並排比較 EP20K600CF33C8N 由 Intel 與 EP20K600CF33C8 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K600CF33C8N | EP20K600CF33C8 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements / Cells | 24,320 | — |
| Total RAM Bits | 311,296 | — |
| Number of LABs / CLBs | 2,432 | — |
| Number of Gates | 1,537,000 (max) | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Core Voltage Supply | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Technology / Process | 0.15 µm CMOS | — |
| Maximum Internal Frequency | 301.21 MHz | — |
| Speed Grade | -8 (slower than -7) | -8 |
| 工作溫度 | 0°C to 85°C (TJ) | Commercial (0 °C to +85 °C) |
| 封裝 | 1020-pin FC-FBGA (flip-chip) | 1020-ball FineLine BGA (FC-FBGA), 33 x 33 mm |
| Pitch | 0.33 mm | — |
| 安裝類型 | Surface Mount | — |
| Programmable Type | In-System / SRAM-based | — |
| Configuration Interface | JTAG (IEEE 1149.1) + Passive Serial / Parallel | — |
| RoHS 狀態 | Compliant (N suffix) | Compliant (lead-free version) / non-compliant for legacy C-speed grade variant |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Typical Gates | — | 600,000 |
| Logic Elements | — | 24,320 |
| Embedded RAM Bits | — | 311,296 |
| Embedded System Blocks (ESB) | — | 152 |
| Maximum User I/O | — | 488 |
| Process Technology | — | 0.15 µm CMOS |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V (bank-selectable) |
| LVDS Support | — | Yes, up to 840 Mbps |
| PLLs | — | 4 enhanced PLLs |
| Configuration Modes | — | Passive Serial, Passive Parallel Asynchronous, Passive Parallel Synchronous, JTAG |
| Status | — | NRND / Last-Time-Buy (per Altera/Intel product notice) |