EP20K600CF672C-7ES vs EP20K600CF672C7ES 比較

詳細並排比較 EP20K600CF672C-7ES 由 Altera 與 EP20K600CF672C7ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K600CF672C7ES EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera

EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera

EP20K600CF672C7ES ⚠ 最後購買機會

規格比較

參數 EP20K600CF672C-7ES EP20K600CF672C7ES
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Family APEX 20KC APEX 20K
Device Type Field Programmable Gate Array (FPGA) —
Maximum System Gates 1,560,000 (typical 600K application gates) —
Typical Logic Elements 24,320 (per APEX 20KC 600K family) —
Maximum User I/O 488 504
Total I/O Lines 504 (per Microchip USA listing) —
Total Inputs 508 —
Embedded System Blocks (ESBs) 248 —
Embedded RAM 248 Kbits (dual-port) —
PLLs 4 —
Propagation Delay 1.48 ns to 1.6 ns 1.6 ns
最大時脈頻率 1666.6 MHz —
Speed Grade -7 —
Process Technology 0.15 micron all-layer copper CMOS 0.15 µm CMOS
封裝 672-ball FCBGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch —
工作溫度 0 C to 85 C (Commercial) [DATA_NEEDED: operating temperature grade]
Core Voltage 1.8 V (typical APEX 20KC, exact value per datasheet) —
Configuration Mode EPC serial / JTAG IEEE 1149.1 —
Compliance RoHS status unknown (verify with manufacturer datasheet) —
Series — APEX 20KC
Logic Elements / Cells — 24320
System Gates — 600000
Maximum Input Lines — 508
Number of Macrocells — 504
Maximum Operating Frequency — 375.94 MHz (per FPGAkey listing)
Internal Reference Clock — 1666.6 MHz
Core Supply Voltage (VCCINT) — 1.8 V
Package Type — FC-FBGA
Pin / Ball Count — 672
Grade Suffix — ES (engineering sample / extended screening)
安裝類型 — Surface Mount (BGA)
MSL 等級 — [DATA_NEEDED: MSL rating]
RoHS 狀態 — [DATA_NEEDED: RoHS compliance]
Configuration Memory — SRAM-based (volatile)

資料表與資源

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