EP20K600CF672C7N vs EP20K600CF672C7ES 比較

詳細並排比較 EP20K600CF672C7N 由 Altera 與 EP20K600CF672C7ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K600CF672C7ES EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera

EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera

EP20K600CF672C7ES ⚠ 最後購買機會

規格比較

參數 EP20K600CF672C7N EP20K600CF672C7ES
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Device Family APEX 20KC —
Maximum System Gates 1,052,000 —
Typical Gates 600,000 —
Logic Elements / Cells 24,320 24320
Maximum User I/O Pins 488 —
Total Package Pins 652 —
封裝 FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch —
Core Voltage 1.8 V —
Maximum Operating Frequency 375.94 MHz 375.94 MHz (per FPGAkey listing)
Propagation Delay 1.48 ns 1.6 ns
Process Technology 0.15 µm all-layer copper-metal CMOS 0.15 µm CMOS
Architecture MultiCore (LUT + Embedded System Memory) —
工作溫度 0 °C to +85 °C (Commercial) [DATA_NEEDED: operating temperature grade]
Speed Grade C7 —
Seated Height 3.50 mm —
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 狀態 unknown [DATA_NEEDED: RoHS compliance]
Series — APEX 20KC
Family — APEX 20K
System Gates — 600000
Maximum User I/O — 504
Maximum Input Lines — 508
Number of Macrocells — 504
Internal Reference Clock — 1666.6 MHz
Core Supply Voltage (VCCINT) — 1.8 V
Package Type — FC-FBGA
Pin / Ball Count — 672
Grade Suffix — ES (engineering sample / extended screening)
MSL 等級 — [DATA_NEEDED: MSL rating]
Configuration Memory — SRAM-based (volatile)

資料表與資源

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