EP20K600CF672C7N vs EP20K600CF672C8N 比較
詳細並排比較 EP20K600CF672C7N 由 Altera 與 EP20K600CF672C8N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K600CF672C7N | EP20K600CF672C8N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Device Family | APEX 20KC | — |
| Maximum System Gates | 1,052,000 | — |
| Typical Gates | 600,000 | — |
| Logic Elements / Cells | 24,320 | — |
| Maximum User I/O Pins | 488 | — |
| Total Package Pins | 652 | — |
| 封裝 | FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Core Voltage | 1.8 V | — |
| Maximum Operating Frequency | 375.94 MHz | — |
| Propagation Delay | 1.48 ns | 1.48 ns |
| Process Technology | 0.15 µm all-layer copper-metal CMOS | — |
| Architecture | MultiCore (LUT + Embedded System Memory) | — |
| 工作溫度 | 0 °C to +85 °C (Commercial) | 0°C to 85°C |
| Speed Grade | C7 | — |
| Seated Height | 3.50 mm | — |
| 安裝類型 | Surface Mount (BGA) | Surface mount |
| RoHS 狀態 | unknown | unknown |
| Device Type | — | SPLD |
| Product Type | — | FPGA / programmable logic device |
| Family | — | APEX 20KC |
| Nominal Gate Capacity | — | 600K gates |
| Logic Elements or Cells | — | 24,320 |
| Macros | — | 2,432 |
| User I/O Count | — | 508 |
| Package Terminals | — | 652 pins |
| Package Description | — | 672-pin FC-FBGA |
| 供應電壓 | — | 1.8 V |
| Listed Frequency | — | 301.21 MHz |
| Fabrication Process | — | 0.15 µm |
| Interconnect Metal | — | All-layer copper metal |
| I/O Configuration | — | 508 user I/O |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |
| Configuration Method | — | [DATA_NEEDED: configuration memory and programming method] |
| Core Current | — | [DATA_NEEDED: core supply current] |
| I/O Bank Voltage | — | [DATA_NEEDED: supported I/O voltage range] |
| Junction Temperature | — | [DATA_NEEDED: maximum junction temperature] |
| 熱阻 | — | [DATA_NEEDED: junction-to-ambient thermal resistance] |