EP20K600EBC652-2X vs EP20K600EFC672-2X 比較

詳細並排比較 EP20K600EBC652-2X 由 Altera 與 EP20K600EFC672-2X 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600EBC652-2X EP20K600EFC672-2X
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Device Family APEX 20KE —
Device Type SPLD / FPGA (Field Programmable Gate Array) —
Logic Elements (LEs) 24,320 —
Macros 24,320 —
Embedded Memory Bits 311,296 bits 311,296
User I/Os 488 —
封裝 652-ball BGA, 45 x 45 mm, 1.27 mm pitch —
Total Pins / Balls 652 —
Propagation Delay 1.48 ns —
工作溫度 0 °C to +85 °C (commercial) 0 °C to +85 °C (commercial)
Process Technology 0.15 µm all-layer copper CMOS 0.15 µm all-layer copper CMOS
Core Supply Voltage 2.5 V —
I/O Standard Support LVTTL, LVCMOS, PCI, SSTL, GTL+ —
Configuration Modes Passive serial, passive parallel, JTAG (IEEE 1149.1) —
安裝類型 Surface Mount —
RoHS 狀態 [DATA_NEEDED: RoHS status] Not RoHS compliant (X suffix is SnPb); use -2N suffix for lead-free
Family — APEX 20KE
Typical Gates — 600,000
Logic Elements / Cells — 24,320
Maximum User I/O — 508
Number of PLLs — 4
Package Type — 672-pin FineLine BGA (FC-FBGA)
Package Size — 45 x 45 mm, 1.27 mm pitch
Core Voltage — 1.8 V
Propagation Delay (typical) — 1.48 ns
Maximum Internal Frequency — 200 MHz
Lead-Free Variant — EP20K600EFC672-2N
Configuration Method — Serial / Parallel (Quartus-supported)

資料表與資源

瀏覽所有產品 建立 BOM 索取報價