EP2A15F672C7AA vs EP2A15F672C7N 比較
詳細並排比較 EP2A15F672C7AA 由 Intel 與 EP2A15F672C7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A15F672C7AA | EP2A15F672C7N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | APEX II | APEX II |
| Typical Gates | 600K | — |
| Maximum System Gates | 1.4M | — |
| Logic Elements (LEs) | 16,640 | — |
| Maximum User I/O | 492 | — |
| Operating Frequency (internal) | 500 MHz | — |
| LVDS Data Rate | 1 Gbps True-LVDS | Up to 1 Gbps (True-LVDS) |
| Core Voltage | 1.5 V | 1.5 V |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, PCI-X, SSTL, HSTL, LVDS, LVPECL, PCML, HyperTransport | LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL |
| MultiVolt I/O Bank Voltages | 1.5V / 1.8V / 2.5V / 3.3V | — |
| Embedded Memory | Dual-port RAM blocks + CAM blocks | — |
| PLLs | 4 enhanced PLLs | — |
| 封裝 | 672-ball FC-FBGA (flip-chip) | 672-ball FC-FBGA (FineLine BGA) |
| Process Technology | 0.15 micrometer all-layer copper (up to 8 metal layers) | 0.15 µm all-layer copper CMOS |
| Programming Interfaces | Passive Serial, Fast Passive Parallel, JTAG (IEEE 1149.1) | — |
| Operating Temperature Grade | Commercial (0C to +85C) | — |
| Lifecycle | Last-Time-Buy / EOL announced Nov-Dec 2016 | — |
| RoHS 狀態 | Compliant (per Full-Electronic listing) | [DATA_NEEDED: RoHS status] |
| Logic Elements (Cells) | — | 16,640 |
| Embedded Memory Bits | — | 425,984 |
| User I/Os | — | 492 |
| Metal Layers | — | Up to 8 |
| Maximum Internal Frequency | — | 500 MHz |
| Speed Grade | — | -7 |
| 工作溫度 | — | Commercial (0C to +85C) |
| Configuration Methods | — | JTAG, Passive Serial |
| 安裝類型 | — | Surface Mount (BGA) |