EP2A25B652C7 vs EP2A25F672C7N 比較

詳細並排比較 EP2A25B652C7 由 Intel 與 EP2A25F672C7N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2A25B652C7 EP2A25F672C7N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX II APEX II
Logic Elements Approximately 25,000 LE 24,320 cells
Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count] —
Maximum User I/O Pins 488 —
封裝 652-ball FineLine BGA —
Speed Grade -7 —
Core Voltage 1.5 V —
I/O Bank Voltage 1.5 V / 1.8 V / 2.5 V / 3.3 V —
RAM Bits (approx.) 40,960 —
PLLs 4 Up to 4
Supported I/O Standards LVTTL, LVCMOS, SSTL, LVDS —
Configuration Method JTAG / Passive Serial / Active Serial —
Boundary Scan IEEE 1149.1 compliant —
Design Software Quartus II —
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
工作溫度 Commercial 0C to +85C 0 °C to 85 °C (commercial)
System Gates — Approximately 900,000
User I/Os — 492
Propagation Delay (tPD) — 1.69 ns
Internal Operating Frequency — Up to 500 MHz
Core Voltage (VCCINT) — 1.5 V
Process Technology — 0.15 µm all-layer copper (up to 8 metal layers)
Logic Family — CMOS
Package Type — 672-ball FC-FBGA (FineLine BGA)
Package Body Size — 27 x 27 mm
Ball Pitch — 1.0 mm
High-Speed I/O Support — True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps
Programmable Logic Type — Loadable PLD (in-system programmable)
Embedded Memory — Embedded System Blocks (ESB) configurable as dual-port RAM/ROM
安裝類型 — Surface Mount

資料表與資源

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