EP2A25F672C8 vs EP2A25F672ES 比較
詳細並排比較 EP2A25F672C8 由 Altera 與 EP2A25F672ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A25F672C8 | EP2A25F672ES |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX II (EP2A25) | APEX II |
| Logic Elements | 25,000 (typical gates) | 24,320 |
| Maximum System Gates | 40,960 | — |
| Macrocells / Embedded Logic | 2,432 macros | — |
| User I/O Count | 492 | — |
| 封裝 | 672-FBGA (FineLine BGA, 27x27 mm, 1.0 mm pitch) | 672-ball FC-FBGA |
| Propagation Delay (tpd) | 1.69 ns | — |
| Speed Grade | C8 | — |
| 工作溫度 | 0 C to 85 C (commercial) | — |
| Process Technology | 0.15 microm CMOS, 8-layer copper interconnect | 0.15 µm CMOS |
| I/O Standards Supported | LVTTL, LVCMOS, PCI-X, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL | — |
| LVDS Data Rate | 1 Gbps | — |
| PLL Count | 4 | — |
| Embedded Memory | ESB blocks (dual-port RAM, FIFO, CAM, ROM) | — |
| I/O Banks | 16 | 16 |
| 安裝類型 | Surface Mount | — |
| RoHS 狀態 | Non-compliant (legacy product) | Compliant |
| Maximum Gates | — | 900,000 |
| Embedded System Blocks (ESBs) | — | 24 |
| Maximum Embedded RAM | — | 1.4 Mbit |
| Maximum User I/O Pins | — | 492 |
| Core Voltage | — | 1.5 V |
| Maximum System Clock Frequency | — | 500 MHz |
| Number of PLLs | — | 4 |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL |
| Configuration Mode | — | Serial / Parallel / JTAG |
| 工作溫度範圍 | — | [DATA_NEEDED: operating temperature range] |