EP2A25F672C9ES vs EP2A25F672C9 比較

詳細並排比較 EP2A25F672C9ES 由 Intel 與 EP2A25F672C9 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP2A25F672C9ES EP2A25F672C9ES - APEX II FPGA 900K Gates 236MHz | Intel

EP2A25F672C9ES - APEX II FPGA 900K Gates 236MHz | Intel

EP2A25F672C9ES ⚠ 最後購買機會

規格比較

參數 EP2A25F672C9ES EP2A25F672C9
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 NRND
Family APEX II APEX II
Logic Elements 24,320 —
System Gates 900,000 —
Maximum Operating Frequency 236 MHz —
Propagation Delay 1.69 ns 1.69 ns
Process Technology 0.15 µm CMOS (up to 8 metal layers, all-layer copper) 0.15 µm all-layer copper, up to 8 metal layers
Core Supply Voltage 1.5 V —
User I/Os 492 —
封裝 672-pin FC-FBGA (FineLine BGA), 27 x 27 mm, 1.0 mm pitch 672-ball FCBGA (FineLine BGA)
Speed Grade -9 —
Configuration Class ES (Enhanced) —
工作溫度 0 °C to 85 °C (Commercial) 0°C to 85°C (Commercial)
安裝類型 Surface Mount Surface Mount
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED]
MSL 等級 [DATA_NEEDED: MSL moisture sensitivity level] —
Logic Family CMOS CMOS
Logic Elements (LE) — Approximately 25,000
Macro Cells — 2432
User I/O — 492
Package Dimensions — 27 mm x 27 mm
Ball Pitch — 1.0 mm
供應電壓 — [DATA_NEEDED: core VCC voltage]
I/O Standards — LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V)
Configuration — Passive Serial, Passive Parallel Synchronous, JTAG
Embedded Memory — ESBs for dual-port RAM, ROM, FIFO

資料表與資源

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