EP2A40F1020C8N vs EP2A40F1020C7N 比較

詳細並排比較 EP2A40F1020C8N 由 Intel 與 EP2A40F1020C7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。

Intel

EP2A40F1020C8N - 1.5M-Gate APEX II FPGA | Intel | Industrial Logic

EP2A40F1020C8N Obsolete

Intel

EP2A40F1020C7N Obsolete

參數	EP2A40F1020C8N	EP2A40F1020C7N
品牌	Intel	Intel
類別	FPGA & CPLD	FPGA & CPLD
生命週期狀態	Obsolete	Obsolete
Product Type	Field-Programmable Gate Array (FPGA)	—
Device Family	APEX II	—
Logic Technology	CMOS	—
Logic Gates	1.5 million	—
Logic Cells	38,400	—
Nominal Supply Voltage	1.5 V	—
Supply Voltage Range	1.425 V to 1.575 V	—
User I/Os	735	—
Package Terminal Count	1,020 pins	—
Package Type	FC-FBGA, BGA-1020	—
Package Body Size	33 mm x 33 mm	—
Ball Pitch	1 mm	—
Reported Operating Frequency	376 MHz	—
Alternative Reported Frequency	562 MHz	—
Reported Propagation Delay	1.78 ns	—
Alternative Reported Propagation Delay	1.55 ns	—
Fabrication Process	0.15 µm	—
Maximum Reported Metal Layers	8 layers	—
工作溫度	0 °C to 85 °C	0 °C to +85 °C (commercial, C7 grade)
安裝類型	Surface Mount	Surface Mount
Terminal Form	Ball	BGA ball (flip-chip)
RoHS 狀態	unknown	—
REACH Status	unknown	—
AEC-Q100 Qualification	unknown	—
Family	—	APEX II
Technology	—	0.15 µm all-layer copper CMOS, up to 8 metal layers
System Gates	—	1,500,000 (1.5 M)
Logic Elements	—	38,400
Embedded Memory	—	ESB-based, 504 Kbits total
Maximum Internal Performance	—	562 MHz
Propagation Delay	—	1.55 ns
User I/O Pins	—	735
PLLs	—	4
Clock Networks	—	12
True-LVDS Data Rate	—	1 Gbps
Supported I/O Standards	—	True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, SSTL
Core Supply Voltage	—	1.5 V nominal (1.425 V – 1.575 V)
Logic Family	—	CMOS
封裝	—	FC-FBGA-1020, 33 × 33 mm, 1.0 mm pitch, fine-line