EP2A40F1020I7N vs EP2A40F1020I9N 比較
詳細並排比較 EP2A40F1020I7N 由 Intel 與 EP2A40F1020I9N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A40F1020I7N | EP2A40F1020I9N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Device Logic Elements | 38,400 cells | — |
| System Gates | 1,500,000 | 1,500,000 (1.5 M) |
| Maximum Operating Frequency | 562 MHz | 366 MHz |
| Process Technology | 0.15 µm | 0.15 um CMOS, up to 8 metal layers |
| Core Voltage | 1.5 V | — |
| 封裝 | 1020-pin FC-FBGA | 1020-pin FC-FBGA (Flip-Chip FineLine BGA) |
| 工作溫度 | -40C to +100C (Industrial) | — |
| Speed Grade | I7 | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Architecture | PLA-type / Look-up Table hybrid | — |
| Number of PLLs | [DATA_NEEDED: PLL count] | — |
| Embedded Memory | [DATA_NEEDED: total embedded memory bits] | ESB-based True-Dual-Port/Single-Port RAM, ROM, CAM (bits [DATA_NEEDED: total RAM bits]) |
| User I/O Pins | [DATA_NEEDED: user I/O pin count] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Design Software | Quartus II | — |
| Device Logic Elements / Cells | — | 38,400 cells |
| Core Supply Voltage | — | 1.5 V |
| User I/O Count | — | 735 bidirectional I/O |
| Operating Temperature Grade | — | Industrial (I9 suffix: -40C to +100C per Altera APEX II convention) |
| High-Speed I/O Standards | — | True-LVDS (up to 1 Gbps), LVPECL, PCML, HyperTransport |
| Clock Management | — | PLLs (count [DATA_NEEDED: PLL count]) |
| Configuration Modes | — | Passive Serial, Passive Parallel Asynchronous/Synchronous, JTAG |
| 生命週期狀態 | — | Obsolete (per distributor listings / Altera APEX II family EOL) |