EP2A40F672C6 vs EP2A40F672C7 比較
詳細並排比較 EP2A40F672C6 由 Altera 與 EP2A40F672C7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A40F672C6 | EP2A40F672C7 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Device | EP2A40 | — |
| Logic Elements (typical) | 40,000 | — |
| Maximum System Gates | [DATA_NEEDED: maximum system gates] | — |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O count] | — |
| 封裝 | 672-ball FineLine BGA (FBGA-672) | 672-ball FC-FBGA (FineLine BGA) |
| Speed Grade | C6 (commercial) | — |
| 工作溫度 | Commercial (0C to +85C) | — |
| Process Technology | 0.18-micron CMOS | 0.15 µm CMOS, all-layer copper, up to 8 metal layers |
| Configuration Memory | SRAM-based | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| PLL Support | Yes | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | Yes |
| Lifecycle | Obsolete / EOL (per Intel/Altera product discontinuation notice) | — |
| Logic Elements | — | 38,400 |
| System Gates | — | 1,500,000 |
| Macro Cells | — | 2,560 |
| Maximum User I/O | — | 492 |
| Core Voltage | — | 1.5 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Pin-to-Pin Delay | — | 1.55 ns (C7 speed grade) |
| Maximum Internal Frequency | — | 562 MHz |
| High-Speed Interface | — | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport |
| PLLs | — | 4 |
| Package Dimensions | — | 27 x 27 mm, 1.0 mm pitch |
| Operating Temperature Grade | — | Commercial (per 'C' suffix in speed grade) |