EP2A40F780 vs EP2A40B724C7 比較

詳細並排比較 EP2A40F780 由 Altera 與 EP2A40B724C7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP2A40F780 EP2A40F780 - APEX II 1.5M Gate FPGA 780-pin FBGA | Intel

EP2A40F780 - APEX II 1.5M Gate FPGA 780-pin FBGA | Intel

EP2A40F780 ⚠ 最後購買機會

規格比較

參數 EP2A40F780 EP2A40B724C7
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Family APEX II APEX II
Device EP2A40 —
Typical Gates 1,500,000 —
Logic Elements 30,000 —
Maximum User I/O Pins [DATA_NEEDED: maximum user I/O count] —
封裝 780-ball FineLine BGA (FBGA) 724-ball FCBGA (FineLine BGA), 35 mm x 35 mm
安裝類型 Surface Mount Surface Mount (BGA)
工作溫度 [DATA_NEEDED: temperature grade] 0 °C to +85 °C (commercial)
Configuration Memory SRAM-based —
Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count] —
Process Technology [DATA_NEEDED: process node] 0.15 µm CMOS, up to 8 metal layers, all-layer copper
JTAG Support IEEE 1149.1 boundary-scan —
Programming File Format .sof/.pof via Quartus II —
Core Voltage [DATA_NEEDED: VCCINT] —
I/O Voltage [DATA_NEEDED: VCCIO range] —
RoHS 狀態 [DATA_NEEDED: RoHS status] Non-compliant (lead-bearing FCBGA)
Logic Elements / Cells — 38,400
Total System Gates — 1,500,000
Embedded RAM Bits — 655,360
Maximum User I/O — 540
Core Supply Voltage — 1.425 V to 1.575 V (typ. 1.5 V)
Maximum Internal Frequency — 562 MHz
PLLs — 4
I/O Standards Supported — LVTTL, LVCMOS, 1.5 V/1.8 V/2.5 V/3.3 V, SSTL, HSTL, PCI, LVDS, LVPECL, PCML, HyperTransport, True-LVDS (1 Gbps)
Configuration Method — JTAG (IEEE 1149.1), Passive Serial, Passive Parallel, Active Serial via EPC configuration devices
MultiVolt I/O Support — 1.5 V, 1.8 V, 2.5 V, 3.3 V
DDR Memory Support — Yes (via ESB / I/O circuitry)
MSL 等級 — [DATA_NEEDED: MSL level]

資料表與資源

瀏覽所有產品 建立 BOM 索取報價