EP2A70B724C7N vs EP2A70B724C7ES 比較
詳細並排比較 EP2A70B724C7N 由 Altera 與 EP2A70B724C7ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A70B724C7N | EP2A70B724C7ES |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | APEX II (EP2A70) | APEX II |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Technology | 0.15 µm CMOS | — |
| System Gates | 3,000,000 | — |
| Logic Cells / Logic Elements | 67,200 | — |
| Maximum Internal Frequency | 420 MHz | — |
| Propagation Delay (typ.) | 2.17 ns | — |
| User I/O Pins | 536 | 540 |
| Macrocells (memory blocks reference) | 16 | — |
| Core Supply Voltage | 1.5 V nominal | — |
| I/O Supply Voltage | MultiVolt (1.5V / 1.8V / 2.5V / 3.3V / 5V tolerant) | — |
| 工作溫度 | 0 °C to +85 °C (Commercial) | — |
| 封裝 | 724-pin FCBGA (Flip-Chip BGA) | 724-pin FCBGA |
| Ball Pitch | 1.27 mm | — |
| Seated Height | 3.5 mm | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Configuration Method | JTAG, Passive Serial (PS), Fast Passive Parallel (FPP) | — |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| Embedded Memory | Embedded System Blocks (ESBs) - dual-port RAM / ROM / CAM | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Typical Gates | — | 3,000,000 (3M) |
| Logic Elements (Cells) | — | 67,200 |
| Maximum Operating Frequency | — | 420 MHz |
| Process Technology | — | 0.15 µm |
| Core Voltage | — | 1.5 V |
| Speed Grade | — | C7 |
| Temperature Grade | — | Commercial (C) |
| 記憶體類型 | — | Embedded System Block (ESB) |
| PLLs | — | Up to 8 |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |
| Programming Interface | — | JTAG / ByteBlaster |
| Device Marking Suffix | — | ES (Engineering Sample) |