EP2C35U484C7 vs EP2C35U484C8 比較

詳細並排比較 EP2C35U484C7 由 Altera 與 EP2C35U484C8 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2C35U484C7 EP2C35U484C8
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND NRND
Family Cyclone II —
Logic Elements (LE) 33,216 —
Total RAM Bits 483,840 bits 483,840 bits (33216 cells)
User I/O Count 322 —
Number of Logic Blocks / Logic Cells 2,076 (per digchip listing) —
Embedded Multipliers (18x18) 35 —
PLLs 4 —
Process Technology 90 nm CMOS —
Core Supply Voltage 1.2 V —
工作溫度 0 C to +85 C (commercial 'C' grade) 0C to 85C (commercial)
Internal Frequency (max) 402.58 MHz 500 MHz
Logic Family CMOS —
封裝 484-FBGA (FineLine BGA, UBGA-484) —
安裝類型 Surface Mount Surface Mount (BGA)
RoHS 狀態 Lead-free / Compliant per Altera product page Compliant (lead-free UBGA)
Speed Grade 7 (fastest commercial for this device) C8 (commercial, 8th tier)
I/O Standards Supported LVDS, LVTTL, LVCMOS, SSTL, PCI —
PCI Support PCI 32/64-bit @ 33/66 MHz; PCI-X 133 MHz (with PHY) —
Series — Cyclone II
Family Name — Cyclone II
Logic Elements / Cells — 33,216 LE
Number of I/O — 322 user I/O
Number of Logic Blocks/Elements — 2,076 logic blocks
Number of Gates — [DATA_NEEDED: equivalent gate count]
Number of PLLs — 4
Embedded Multipliers — 35 (18x18)
Package Type — 484-FBGA (UBGA-484), lead-free
Package Pin Count — 484 balls
Core Voltage — 1.15 V to 1.25 V
Logic Family / Process — CMOS, 90 nm
Configuration Modes — JTAG, AS, PS, FPP
MSL 等級 — 3 (per JEDEC J-STD-020)
生命週期狀態 — Not Recommended for New Designs (NRND)

資料表與資源

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