EP2S130F1020C4RB vs EP2S130F1020C5ES 比較
詳細並排比較 EP2S130F1020C4RB 由 Intel 與 EP2S130F1020C5ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2S130F1020C4RB | EP2S130F1020C5ES |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Device Family | Stratix II (EP2S130) | — |
| Logic Elements | 132,540 | 132,540 |
| Adaptive Logic Modules (ALMs) | 53,016 | 53,016 |
| User I/O Pins | 742 | — |
| 封裝 | 1020-ball FBGA | 1020-ball FC-FBGA (flip-chip BGA) |
| Total RAM Bits | 6,747,000 | — |
| 18x18 Multipliers | 152 (per device family) | — |
| Transceiver Channels | 12 (up to 6.375 Gbps per family) | — |
| Speed Grade | C4 | -5 |
| Core Voltage | 1.2 V (typical) | 1.2 V |
| Process Technology | 90 nm | 90 nm |
| 工作溫度 | Commercial (0C to +85C) | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: confirm RoHS class] | Compliant (lead-free) |
| Lead-Free | [DATA_NEEDED: confirm lead-free status] | — |
| Family | — | Stratix II |
| Embedded Memory Bits | — | 6,747,840 |
| Maximum User I/Os | — | 742 |
| Maximum Internal Clock Frequency | — | 609.76 MHz |
| Operating Temperature (Junction) | — | 0C to 85C (commercial) |
| Logic Array Blocks (LABs) | — | 6,747 |
| Total RAM Blocks | — | [DATA_NEEDED: total RAM blocks] |
| Embedded DSP Blocks | — | [DATA_NEEDED: embedded DSP blocks count] |
| Embedded 18x18 Multipliers | — | [DATA_NEEDED: 18x18 multiplier count] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Configuration | — | SRAM-based, JTAG/AS/PS modes |