EP2S130F780C5 vs EP2S130F1020C5N 比較

詳細並排比較 EP2S130F780C5 由 Intel 與 EP2S130F1020C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2S130F780C5 EP2S130F1020C5N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Family Stratix II Stratix II
Logic Elements 132,540 132,540
Logic Array Blocks (LABs) 6627 —
User I/O Count 534 —
Embedded Memory (bits) 6,737,280 —
Embedded 18x18 Multipliers 252 —
Process Technology 90 nm CMOS 90 nm
Core Voltage (VCCINT) 1.15 V to 1.25 V (typ. 1.2 V) —
Internal Clock Frequency (max) 609.76 MHz —
Speed Grade C5 —
工作溫度 0 C to +85 C (TJ) Commercial (0C to +85C, C5 grade)
封裝 780-FBGA (FC-FBGA), 29 mm x 29 mm 1020-ball FC-FBGA (33x33 mm)
Lead-Free / RoHS Lead Free / RoHS Compliant —
Configuration Interface JTAG (IEEE 1149.1) + Passive Serial / Fast Passive Parallel —
DSP Performance Up to ~1.4 GMACs (per family datasheet) —
Adaptive Logic Modules (ALMs) — 6627 LABs (per Jotrin listing)
Total Memory Bits — 6,747,840 bits
User I/Os — 734
Core Supply Voltage (VCCINT) — 1.15 V to 1.25 V
Maximum Internal Frequency — 609.76 MHz
安裝類型 — Surface Mount
Temperature Grade — C5 (other - per Partstack)
RoHS 狀態 — [DATA_NEEDED: rohs status]
Lead-Free — [DATA_NEEDED: lead-free status]
PLLs — 4 (typical Stratix II feature)
Global Clock Networks — 16 (typical Stratix II feature)
Configuration Method — Serial/Parallel via Quartus II (typical Stratix II)
Country of Origin — Republic of Korea (per GlobalSpec)
ECCN — 3A001.a.7.a (per GlobalSpec)
Estimated EOL Date — 2023 (per GlobalSpec)

資料表與資源

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