EP2S30F672I5 vs EP2S30F672I4 比較
詳細並排比較 EP2S30F672I5 由 Intel 與 EP2S30F672I4 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2S30F672I5 | EP2S30F672I4 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | Stratix II | — |
| Logic Elements (LE) | 33,880 | — |
| Adaptive Logic Modules (ALM) | 13,567 (approx., per Stratix II family ratio) | — |
| Total RAM Bits | 1,368,576 (1.36 Mbit) | 1369728 |
| DSP Blocks | 16 (9-bit x 9-bit multipliers) | 12 (per datasheet, family range) |
| Maximum User I/Os | 500 (492 outputs reported) | — |
| Maximum Operating Frequency | 609.76 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Supply Voltage | 1.2 V | — |
| I/O Supply Voltage | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) | — |
| 封裝 | 672-ball FC-FBGA (FineLine BGA) | — |
| Ball Pitch | 1.00 mm | 1.0 mm |
| 工作溫度 | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating] | 3 (per JEDEC J-STD-020) |
| RoHS 狀態 | Compliant | [DATA_NEEDED: confirm RoHS compliance on part label] |
| Lead-Free | Yes | — |
| Speed Grade | 5 (fast) | — |
| Series | — | Stratix II |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements | — | 33880 |
| Logic Array Blocks (LABs) | — | 1694 |
| Number of I/O | — | 500 |
| Number of PLLs | — | 6 |
| Voltage - Supply | — | 1.2 V core, separate I/O bank VCCIO |
| 封裝 / 外殼 | — | 672-BBGA, FCBGA (FBGA-672) |
| Package Dimensions | — | 35 x 35 mm |
| Configuration | — | JTAG, serial, parallel (Stratix II scheme) |