EP2S60F1020C5N vs EP2S60F1020C3 比較
詳細並排比較 EP2S60F1020C5N 由 Altera 與 EP2S60F1020C3 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2S60F1020C5N | EP2S60F1020C3 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| Series | Stratix II | Stratix II |
| Number of Logic Elements | 60440 | — |
| Number of LABs/CLBs | 3022 | — |
| Number of Logic Array Blocks | 3022 LABs | — |
| Total RAM Bits | 2544192 bits | 2,544,192 bits (2.5 Mbit) |
| Number of User I/O | 718 | — |
| 封裝 / 外殼 | 1020-BBGA, FCBGA | — |
| Number of Terminals | 1020 | — |
| Terminal Form | BALL | — |
| Package Code | BGA | — |
| Package Shape | SQUARE | — |
| 供應電壓 | 1.15 V to 1.25 V | — |
| 工作溫度 | 0°C ~ 85°C (TJ) | 0C to +85C (commercial, C3 speed grade) |
| 安裝類型 | Surface Mount | Surface Mount |
| Speed Grade / Order Code | C5 (commercial speed grade per Altera order code) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL] | — |
| Number of DSP Blocks | [DATA_NEEDED: Number of DSP blocks] | — |
| Number of M512 RAM Blocks | [DATA_NEEDED: Number of M512 RAM blocks] | — |
| Number of M4K RAM Blocks | [DATA_NEEDED: Number of M4K RAM blocks] | — |
| Family | — | Stratix II FPGA |
| Logic Elements (LEs) | — | 60,440 |
| Logic Array Blocks (LABs) | — | 3022 |
| User I/O Count | — | 718 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O banks] |
| DSP Blocks (18x18 multipliers) | — | 144 18x18 multipliers (36 DSP blocks) |
| PLLs | — | 12 |
| Global Clock Networks | — | 18 |
| Maximum Internal Frequency | — | 816.99 MHz |
| Core Voltage | — | 1.2 V |
| Process Technology | — | 90 nm CMOS |
| 封裝 | — | 1020-ball FC-FBGA |
| Package Body Size | — | 33 mm x 33 mm, 1.0 mm ball pitch |
| Supplier Device Package | — | 1020-BGA |
| Speed Grade | — | C3 |