EP2S60F484C3N vs EP2S60F484C5N 比較

詳細並排比較 EP2S60F484C3N 由 Intel 與 EP2S60F484C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP2S60F484C5N EP2S60F484C5N - 60K LE Stratix II FPGA, 484-FBGA | Intel

EP2S60F484C5N - 60K LE Stratix II FPGA, 484-FBGA | Intel

EP2S60F484C5N ⚠ 最後購買機會

規格比較

參數 EP2S60F484C3N EP2S60F484C5N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND 最後購買
Family Stratix II Stratix II
Logic Elements 60,440 60,440
Adaptive LUTs (ALUTs) 48,352 —
Embedded Memory (TriMatrix) 2,544 Kbits (M4K + M512 + M-RAM) —
Embedded DSP Blocks 12 (48 GMACs at 450 MHz) —
Maximum User I/O Pins 334 —
封裝 484-BGA (F484), 1.0 mm pitch 484-ball FBGA (FineLine BGA)
Process Technology 90 nm CMOS, 1.2 V core 90 nm CMOS
Speed Grade -3 (fastest commercial) C5 (slowest)
Operating Temperature (Commercial) 0C to +85C (TJ) —
Supply Voltage VCCINT 1.2 V nominal —
Configuration Modes FPP, AS, PS, JTAG —
MSL 等級 3 (per JEDEC J-STD-020) —
RoHS 狀態 Compliant Compliant (lead-free)
Lead-Free Yes —
Adaptive Logic Modules (ALMs) — 24,176
Embedded Memory Bits — 2,544,192 bits
Embedded RAM Blocks (TriMatrix) — Yes
DSP Blocks — 36
18x18 Multipliers — Up to 144 (max for family: 384)
Maximum User I/O — 334
Transceiver Blocks — 12 (up to 6.375 Gbps)
PLLs — 12 (enhanced + fast)
Core Voltage — 1.2 V
I/O Standards — LVTTL, LVCMOS, LVDS, LVPECL, PCI, PCI-X
Temperature Grade — Commercial (0C to +85C junction)
Configuration Scheme — SRAM-based, volatile (requires EPC16/EPC64 or JTAG)

資料表與資源

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