EP2SGX130GF40C3NES vs EP2SGX90EF35C3NES 比較
詳細並排比較 EP2SGX130GF40C3NES 由 Altera 與 EP2SGX90EF35C3NES 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP2SGX130GF40C3NES - Stratix II GX FPGA, 132K LE, 6.375Gbps | Altera
EP2SGX130GF40C3NES Obsolete規格比較
| 參數 | EP2SGX130GF40C3NES | EP2SGX90EF35C3NES |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 132540 | 90,000 |
| Logic Array Blocks (LABs) | 7047 | — |
| Maximum Internal Frequency | 778.82 MHz | — |
| Process Technology | 90 nm CMOS | — |
| Core Voltage | 1.2 V | — |
| Transceiver Channels | 4 to 20 (per device family configuration) | 4 to 20 |
| Maximum Transceiver Data Rate | 6.375 Gbps | — |
| Transceiver Feature | Embedded SERDES with Clock/Data Recovery (CRU) | — |
| 記憶體類型 | TriMatrix embedded memory (distributed RAM, block RAM, shift register) | — |
| 封裝 | 1508-ball FC-FBGA (40 x 40 mm, 1 mm pitch) | — |
| Operating Temperature Grade | Commercial Extended | Commercial Extended |
| Terminal Form | Ball (BGA) | — |
| 安裝類型 | Surface Mount | — |
| RoHS 狀態 | Lead-free compliant (per package code MS-034AAU-1) | [DATA_NEEDED: rohs] |
| Series | EP2SGX130 | — |
| Number of Terminals | — | 35 |
| Package Type | — | BGA |
| Package Shape | — | Square |
| Form of Terminal | — | Ball |
| Core Supply Voltage | — | 1.2 V |
| Transceiver Data Rate (max) | — | 6.375 Gbps |
| Process Node | — | 90 nm |
| Logic Element | — | ALM (Adaptive Logic Module) |
| Configuration Interface | — | JTAG / Passive Serial / Active Serial |
| Embedded Memory Type | — | TriMatrix |
| Lead Free | — | [DATA_NEEDED: lead_free] |