EP2SGX130GF40C4NES vs EP2SGX130GF40C5ES 比較
詳細並排比較 EP2SGX130GF40C4NES 由 Intel 與 EP2SGX130GF40C5ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP2SGX130GF40C4NES - 132K LE Stratix II GX FPGA, 6.375Gbps SERDES, 1508-FBGA | Intel
EP2SGX130GF40C4NES ⚠ 最後購買機會Altera
EP2SGX130GF40C5ES - Stratix II GX 132K LC FPGA, FC-FBGA-1508 | Altera
EP2SGX130GF40C5ES ⚠ 最後購買機會規格比較
| 參數 | EP2SGX130GF40C4NES | EP2SGX130GF40C5ES |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | 最後購買 |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 132,540 | 132,540 |
| Logic Blocks / ALMs | Approximately 53,000 ALMs | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | — |
| Maximum Transceiver Data Rate | 6.375 Gbps | — |
| Transceiver Channels | Up to 20 (4 to 20, device-dependent) | — |
| User I/O Pins | 734 | — |
| Total Package Pins | 1508 (FC-FBGA ball grid) | — |
| Package Code | GF40 (FC-FBGA, 40x40 mm, 1.0 mm pitch) | — |
| Speed Grade | C4 (speed grade -4) | C5 (mid-upper) |
| Internal Operating Frequency | Up to 717 MHz | — |
| Embedded Memory | Approximately 4.5 Mbits (TriMatrix) | — |
| PLL Blocks | 8 | — |
| DSP Blocks | Yes (variable, see datasheet) | — |
| 安裝類型 | Surface Mount (flip-chip BGA) | Surface Mount |
| Lead-Free / RoHS | Yes (LEAD FREE per datasheet family code) | — |
| MSL 等級 | Per JEDEC J-STD-020, typically MSL-4 or higher [DATA_NEEDED: exact MSL level] | — |
| 工作溫度 | Commercial Extended (per N suffix) | 0C to +85C (Commercial Extended) |
| JEDEC Standard Reference | MS-034AAU-1 | — |
| Logic Array Blocks (LABs) | — | 7,047 |
| Internal Frequency (max) | — | 609.76 MHz |
| Core Supply Voltage (nominal) | — | 1.2 V |
| 封裝 | — | FC-FBGA-1508 (40 x 40 mm, 1 mm pitch) |
| Ball Count | — | 1508 |
| Package Type | — | Flip-Chip Fine-pitch BGA |
| Lead-Free / Halogen-Free | — | Yes (G suffix) |
| RoHS 狀態 | — | Compliant |
| Configuration Interface | — | JTAG / Passive Serial / Active Serial |