EP2SGX60DF780C5N vs EP2SGX60DF780I3N 比較

詳細並排比較 EP2SGX60DF780C5N 由 Altera 與 EP2SGX60DF780I3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2SGX60DF780C5N EP2SGX60DF780I3N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Family Stratix II GX Stratix II GX
Logic Elements 60,440 60,440
Number of LABs/CLBs 3,022 —
Embedded Memory (bits) 2,544,192 (≈2.5 Mb) —
User I/O Count 364 —
Number of Transceivers 12 —
Max Transceiver Data Rate 6.375 Gbps —
Internal Frequency (max) 609.76 MHz —
Process Technology 90 nm CMOS 90 nm CMOS
Core Supply Voltage 1.2 V —
Package Type 780-pin Flip-Chip BGA (FBGA-780) —
Operating Temperature Grade Commercial —
Speed Grade 5 (lower speed, higher Fmax margin) I3
安裝類型 Surface Mount (BGA) Surface Mount
RoHS 狀態 [DATA_NEEDED: confirm RoHS compliance from manufacturer product page] [DATA_NEEDED: per-lot RoHS confirmation]
Design Software Quartus II —
Series — EP2SGX60
Configurable Logic Blocks (CLBs) — 60,440
最大時脈頻率 — 622.08 MHz
Nominal Core Supply Voltage — 1.2 V
封裝 — 780-ball FC-FBGA (S-PBGA-B780)
Terminal Pitch — 1.00 mm
工作溫度範圍 — -40 °C to +85 °C (Industrial)
High-Speed Serial Transceivers — Multi-gigabit embedded transceivers (per Stratix II GX family)
On-chip Memory — TriMatrix embedded memory blocks (per Stratix II GX family)
Logic Element Architecture — Adaptive Logic Module (ALM)
DSP Blocks — Embedded multiplier/DSP blocks (per Stratix II GX family)
Design Tool — Quartus II (Stratix II GX support)

資料表與資源

瀏覽所有產品 建立 BOM 索取報價