EP2SGX60EF1152C4K vs EP2SGX60E1152C 比較

詳細並排比較 EP2SGX60EF1152C4K 由 Altera 與 EP2SGX60E1152C 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2SGX60EF1152C4K EP2SGX60E1152C
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Manufacturer Intel / Altera —
Series Stratix II GX —
Device Family Stratix II GX —
Logic Elements 60,440 60440
Logic Array Blocks (LABs) 3022 —
Adaptive Logic Modules (ALMs) 24,176 —
Embedded Memory (bits) 2,544,192 —
Embedded Memory (Kbits) 3024 —
Embedded 18x18 Multipliers Up to 252 —
User I/Os 534 —
Transceivers Up to 12 (6.375 Gbps) —
Maximum Fabric Frequency 732.1 MHz —
Process Technology 90 nm CMOS —
Core Voltage (VCC) 1.2 V —
Speed Grade C4 C (commercial, fastest)
工作溫度 0C to 85C (Commercial) 0C to +85C (commercial)
封裝 1152-BBGA / FC-FBGA, Flip-Chip 1152-ball FineLine BGA
安裝類型 Surface Mount —
RoHS 狀態 [DATA_NEEDED: RoHS status] Compliant
Lead-Free [DATA_NEEDED: lead-free status] —
Configuration Mode Enhanced Configuration (EPC) - K suffix —
Family — Stratix II GX
On-chip RAM (bits) — 2544192
DSP / Embedded Multiplier Blocks — 144 (18x18 multipliers)
Maximum User I/O — 534
Process Node — 90 nm
Multi-gigabit Transceivers — 20 channels
Transceiver Data Rate — 600 Mbps to 6.375 Gbps
PCI Express Hard IP — x1, x4, x8 endpoints and root ports
Embedded Memory Type — TriMatrix (MLAB + M512 + M4K)
Configuration — Active serial / Fast passive parallel / JTAG

資料表與資源

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