EP2SGX90EF1152C4 vs EP2SGX90EF35C4NES 比較
詳細並排比較 EP2SGX90EF1152C4 由 Altera 與 EP2SGX90EF35C4NES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2SGX90EF1152C4 | EP2SGX90EF35C4NES |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | NRND |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Family | Stratix II GX | Stratix II GX |
| Logic Cells | 90960 cells | — |
| Logic Array Blocks | 4548 LABs | — |
| User I/O | 558 I/O | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Core Voltage | 1.2 V | 1.2 V |
| Reported Maximum Frequency | 732.1 MHz | — |
| Alternate Reported Maximum Frequency | 717 MHz | — |
| Package Type | FC-FBGA | — |
| Package Pin Count | 1152 pins | — |
| Alternate Package Description | FBGA-1152 | — |
| Package Mounting | Surface Mount | — |
| Lead-Free Status | Lead free | — |
| RoHS 狀態 | RoHS Compliant | Pb-free (N suffix indicates lead-free assembly) |
| 工作溫度 | [DATA_NEEDED: operating temperature] | Commercial Extended (0C to +85C) [DATA_NEEDED: exact lower/upper bound] |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Configuration Method | [DATA_NEEDED: configuration method] | Serial / Passive parallel / Fast passive parallel |
| Logic Elements | — | Approximately 90,000 |
| Embedded Memory | — | Up to 4.5 Mbits (M4K + M-RAM blocks) |
| Transceivers | — | 12 multi-gigabit transceivers |
| Transceiver Data Rate | — | Up to 6.375 Gbps |
| Hardware Multipliers | — | Up to 192 (18x18) |
| MultiVolt I/O | — | Supports 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Speed Grade | — | C4 (commercial-extended) |
| 封裝 | — | FBGA-35 / 1152-ball BGA family |
| 安裝類型 | — | Surface Mount (BGA) |
| PLLs | — | Up to 8 (4 quadrants) |