EP2SGX90EF35C4NES vs EP2SGX90EF1508C4 比較

詳細並排比較 EP2SGX90EF35C4NES 由 Altera 與 EP2SGX90EF1508C4 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2SGX90EF35C4NES EP2SGX90EF1508C4
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Family Stratix II GX Stratix II GX
Logic Elements Approximately 90,000 —
Embedded Memory Up to 4.5 Mbits (M4K + M-RAM blocks) —
Transceivers 12 multi-gigabit transceivers —
Transceiver Data Rate Up to 6.375 Gbps 600 Mbps to 6.375 Gbps
Hardware Multipliers Up to 192 (18x18) —
Core Voltage 1.2 V —
MultiVolt I/O Supports 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Speed Grade C4 (commercial-extended) C4
工作溫度 Commercial Extended (0C to +85C) [DATA_NEEDED: exact lower/upper bound] Commercial (0C to +85C)
封裝 FBGA-35 / 1152-ball BGA family 1508-ball FCBGA (40 x 40 mm, 1 mm pitch)
安裝類型 Surface Mount (BGA) —
RoHS 狀態 Pb-free (N suffix indicates lead-free assembly) [DATA_NEEDED: RoHS status]
Process Technology 90 nm CMOS 90 nm CMOS
PLLs Up to 8 (4 quadrants) 8 (Enhanced)
Configuration Method Serial / Passive parallel / Fast passive parallel —
Logic Elements (LE) — 90,960
Adaptive Logic Modules (ALM) — 45,480
Embedded Memory Bits — 4,520,448
Total Block Memory Bits — 4,520,448 bits
Embedded Multipliers (18x18) — [DATA_NEEDED: 18x18 multiplier count]
Multi-Gigabit Transceivers — Up to 12 channels
Maximum User I/O Pins — 650
Global Clocks — 16
DLLs — 4
Programming Tool — Altera Quartus II (version 7.2 or later)

資料表與資源

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