EP3SE110F1152I2N vs EP3SE110F1152I3N 比較

詳細並排比較 EP3SE110F1152I2N 由 Intel 與 EP3SE110F1152I3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP3SE110F1152I3N EP3SE110F1152I3N - Stratix III E FPGA, 107K LE, 1152-FCBGA | Altera

EP3SE110F1152I3N - Stratix III E FPGA, 107K LE, 1152-FCBGA | Altera

EP3SE110F1152I3N ⚠ 最後購買機會

規格比較

參數 EP3SE110F1152I2N EP3SE110F1152I3N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 最後購買
Series Stratix III Enhanced (EP3SE110) Stratix III E
Family Stratix III Stratix III E FPGA
Logic Elements (LE) 107,500 107,500
Logic Array Blocks (LABs) / CLBs 4,300 —
System Gates 8,936,448 —
User I/O Pins 744 —
Number of Terminals 1,152 —
Package Code BGA (FCBGA) —
Package Shape Square —
Ball Pitch 1.00 mm —
Supply Voltage Range 1.05 V to 1.15 V (nominal 1.1 V) —
Process Technology 40 nm low-power CMOS 65 nm CMOS
Maximum Internal Clock Frequency 100 MHz (per distributor summary; device supports multi-Gbps transceivers) —
工作溫度 -40C to +100C (industrial) —
Speed Grade I2 -3 (I3 fast grade, industrial)
Lead-Free / RoHS Yes (suffix N) Lead-free (N suffix); RoHS compliance status: see Stratix III Device Handbook
安裝類型 Surface Mount Surface Mount
Manufacturer — Altera (now Intel PSG)
Total RAM Bits — 8,936,448
Maximum User I/Os — 744
Logic Array Blocks (LABs) — 4300
Number of I/O Banks — Modular I/O banks (see Stratix III Device Handbook)
Core Voltage — 1.1 V
工作溫度範圍 — -40C to +100C (industrial, I3 grade)
封裝 — 1152-ball FC-FBGA (Flip-Chip Fine-pitch BGA)
Configuration — JTAG via Quartus II; supports AS, PS, JTAG, FPP modes
Internal Supply Voltage (Max) — 0.94 V (per Partstack listing)

資料表與資源

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